RAM=DISABLE, FLASHREG=DISABLE, WWDT=DISABLE, SPI1=DISABLE, GPIO=DISABLE, FLASH=DISABLE, WKT=DISABLE, UART0=DISABLE, SYS=RESERVED, I2C=DISABLE, MRT=DISABLE, SCT=DISABLE, CRC=DISABLE, ACMP=DISABLE, IOCON=DISABLE, SWM=DISABLE, UART1=DISABLE, UART2=DISABLE, SPI0=DISABLE, ROM=DISABLE
System clock control
| SYS | Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1. 0 (RESERVED): Reserved 1 (ENABLE): Enable |
| ROM | Enables clock for ROM. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RAM | Enables clock for SRAM. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| FLASHREG | Enables clock for flash register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| FLASH | Enables clock for flash. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| I2C | Enables clock for I2C. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| GPIO | Enables clock for GPIO port registers and GPIO pin interrupt registers. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| SWM | Enables clock for switch matrix. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| SCT | Enables clock for state configurable timer. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| WKT | Enables clock for self wake-up timer. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| MRT | Enables clock for multi-rate timer. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| SPI0 | Enables clock for SPI0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| SPI1 | Enables clock for SPI1. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CRC | Enables clock for CRC. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| UART0 | Enables clock for UART0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| UART1 | Enables clock for UART1. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| UART2 | Enables clock for UART2. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| WWDT | Enables clock for WWDT. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| IOCON | Enables clock for IOCON block. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| ACMP | Enables clock to analog comparator. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RESERVED | Reserved |